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ARM LDR/STR, LDM/STM instructions

tags: ARM

Here are the four commands that are easy to confuse, which are already here4A lot of effort was spent on the confusion of the instructions, now I will make a summary,LDRSTRLDMSTMThese four instructions,

onLDMwithSTMFor the description, see another documentation, which explains the precautions when these two files are used for stack operations.

1LDRLMeansLOADLOADThe meaning of should be understood as:Load from memory into register. The following statement is very clear:

LDR   R1,     [R2] ; R1<——[R2]

Just putR2The value of the contents of the storage unit pointed to (amemoryThe value in the address), readR1Medium (aregister) 

2STRSMeansSTORESTOREThe meaning of should be understood as:Store from a register into memory. The following statement is very clear:

STR    R1,     [R2] ; R1——>[R2]

RegisterR1"Save" the content inIn the storage unit pointed to by R2(Onememoryaddress).

Obviously, these two statements have a feature, that is, the register is written in the front (left) and the memory address is written in the back (right), and the direction of data transfer is exactly the opposite. To

The following is an introduction to LDM and STM, using sp to introduce, because in actual use, it is used more with sp. To

3LDMLThe meaning of is stillLOAD, That isLoad from memory into register

Although it seems to be an upgrade of LDR,It must be noted that the direction of this command is different from that of LDR, it runs from left to right.

The instruction is to assign the data in the stack in the memory to the register in batches, which is a pop operation;

The stack pointer generally corresponds toSP,noteSPIs a registerR13, But actually usedR13In the memory address, but the instruction is not written as[R13]

at the same time,LDMThe position of the register and memory address in the instruction has changed relative to the previous two instructions. The following example:

LDMFD     SP! ,   {R0, R1, R2}It can actually be understood as:    LDMFD     [SP]!,    {R0, R1, R2}

Meaning: copy the data in the 3 consecutive address segments pointed to by sp (should be 3*4=12 bytes (because r0, r1, and r2 are all 32 bits)) to the 3 registers of r0, r1, and r2 Go in

If you don’t understand this place, you can refer to the link mentioned at the beginning of my article, which has a detailed diagram.) 

4STMSThe meaning of is stillSTORE,versusLDMIt is used in pairs, and its command format is also similar, that is, it is different fromSTR, Is to write the stack pointer on the left, and write the register group on the right.

   STMFD      SP!,   {R0}Similarly, the instruction can also be understood as:  STMFD      [SP]!,   {R0}

Means: putR0Save to the stack (address pointed to by sp). To

Obviously, these two stack operation instructions also have a feature, that is, the register group is written at the back (right) and the stack pointer is written at the front (left).

And what is actually used is the memory address in the stack pointer, which is different from the previous two instructions.

(Supplement: after sp!, the function means that after the command is executed, the corresponding address value is assigned to sp. For the SDM of the routine, it means that the value of the last sp should be sp+3*4=sp+12)

Among the four instructions, the first two and the latter two are not much related, but they are quite different. Therefore, you can directly distinguish these two sets of instructions and think that there is no connection between them, so as to avoid misunderstandings.

The main purposes of STM and LDM are on-site protection, data replication, parameter transfer, etc. There are 8 modes, as follows:

Note: The first 4 types are used for data block transmission, the latter 4 types are used for stack operations

(1) IA Add 4 to the address after each transmission - Inc After

(2) IB Add 4 to the address before each transmission - Inc Before

(3) DA address minus 4 after each transmission - Dec After

(4) DB Address minus 4 before each transmission - Dec Before

(5) FD Full decrement stack

(6) FA Full increment stack

(7) ED Empty decrement stack

(8) EA empty increment stack

The following description is also applicable to empty decrement stack and empty increment stack.

In stack operation, it is often wrong to think that after using STMFD full decrement to push the register onto the stack, LDMFA should be used when popping data.

But FD and FA are only used to indicate the current stack mode (there are four stack modes), FD indicates that the current stack is a full decrementing stack.

Then the instruction when the data is pushed into the stack is STMFD, and the instruction when the data is pushed out of the stack corresponds to LDMFD, not LDMFA.

We can think that STMFD is equivalent to STMDB, and LDMFD is equivalent to STMIA

So, what is the order of data transmission and the order of data on the stack?

Let’s take a look at the STMFD SP!,{R1-R3} execution result graph (after the operation, SP points to SP')

                 SP------->
                           |R3|
                           |R2|
                 SP'------>|R1|

 

Then STMFD SP!, {R3, R2, R1} is the stack sequence after execution just opposite to the above stack sequence. In actual situation, the stack data sequence after the execution of these two instructions is the same.

Because the ARM compiler will automatically convert STMFD SP!,{R3,R2,R1} into STMFD SP!,{R0-R3} instructions, that is to say, the ARM compiler defaults the high registers to be stored on the stack first.

Even if you deliberately "arrange" the register stacking order in the instruction STMFD SP!,{R3,R2,R1}, and the compiler reprocesses it during compilation, disrupting the data stacking order you expect.

Similarly, STMDB R0!, {R1-R3} and STMDB R0!, {R3, R2, R1} have the same order of data in the stack after the instructions are executed.

STMFD SP!,{R1-R3} The corresponding pop-out instruction is LDMFD SP!,{R1-R3} (R1, R2, R3 are in any order)

 


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